cirros-testvm/src-cirros/buildroot-2015.05/board/telit/evk-pro3/barebox-2013.04.0-0002-watchdog-add-at91sam9-watchdog-support.patch

   1 From e1d54ffb987c346c45c20968be34c50c62a91c07 Mon Sep 17 00:00:00 2001
   2 From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   3 Date: Wed, 14 Nov 2012 19:17:47 +0800
   4 Subject: [PATCH 2/5] watchdog: add at91sam9 watchdog support
   5
   6 with keep alive support
   7
   8 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   9 ---
  10  drivers/watchdog/Kconfig        |   7 +++
  11  drivers/watchdog/Makefile       |   1 +
  12  drivers/watchdog/at91sam9_wdt.c | 131 ++++++++++++++++++++++++++++++++++++++++
  13  drivers/watchdog/at91sam9_wdt.h |  38 ++++++++++++
  14  4 files changed, 177 insertions(+)
  15  create mode 100644 drivers/watchdog/at91sam9_wdt.c
  16  create mode 100644 drivers/watchdog/at91sam9_wdt.h
  17
  18 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
  19 index 0b4dc84..98a21d7 100644
  20 --- a/drivers/watchdog/Kconfig
  21 +++ b/drivers/watchdog/Kconfig
  22 @@ -11,6 +11,13 @@ menuconfig WATCHDOG
  23
  24  if WATCHDOG
  25
  26 +config WATCHDOG_AT91SAM9X
  27 +       tristate "AT91SAM9X / AT91CAP9 watchdog"
  28 +       depends on ARCH_AT91
  29 +       help
  30 +         Watchdog timer embedded into AT91SAM9X and AT91CAP9 chips. This will
  31 +         reboot your system when the timeout is reached.
  32 +
  33  config WATCHDOG_MXS28
  34         bool "i.MX28"
  35         depends on ARCH_IMX28
  36 diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
  37 index f522b88..3d15d52 100644
  38 --- a/drivers/watchdog/Makefile
  39 +++ b/drivers/watchdog/Makefile
  40 @@ -1,3 +1,4 @@
  41  obj-$(CONFIG_WATCHDOG) += wd_core.o
  42 +obj-$(CONFIG_WATCHDOG_AT91SAM9X) += at91sam9_wdt.o
  43  obj-$(CONFIG_WATCHDOG_MXS28) += im28wd.o
  44  obj-$(CONFIG_WATCHDOG_IMX_RESET_SOURCE) += imxwd.o
  45 diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
  46 new file mode 100644
  47 index 0000000..203d83a
  48 --- /dev/null
  49 +++ b/drivers/watchdog/at91sam9_wdt.c
  50 @@ -0,0 +1,131 @@
  51 +/*
  52 + * (c) 2012 Juergen Beisert <kernel@pengutronix.de>
  53 + *
  54 + * This program is free software; you can redistribute it and/or modify
  55 + * it under the terms of the GNU General Public License as published by
  56 + * the Free Software Foundation; either version 2 of the License, or
  57 + * (at your option) any later version.
  58 + *
  59 + * This program is distributed in the hope that it will be useful,
  60 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  61 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  62 + * GNU General Public License for more details.
  63 + *
  64 + * Note: this driver works for the i.MX28 SoC. It might work for the
  65 + * i.MX23 Soc as well, but is not tested yet.
  66 + */
  67 +
  68 +#include <common.h>
  69 +#include <init.h>
  70 +#include <io.h>
  71 +#include <errno.h>
  72 +#include <malloc.h>
  73 +#include <watchdog.h>
  74 +
  75 +#include "at91sam9_wdt.h"
  76 +
  77 +struct at91sam9_wdt {
  78 +       struct watchdog wdt;
  79 +       void __iomem *base;
  80 +};
  81 +
  82 +#define to_at91sam9_wdt(h) container_of(h, struct at91sam9_wdt, wdt)
  83 +
  84 +#define wdt_read(at91wdt, field) \
  85 +       __raw_readl(at91wdt->base + field)
  86 +#define wdt_write(at91wdt, field, val) \
  87 +       __raw_writel((val), at91wdt->base + field)
  88 +
  89 +static void at91sam9_wdt_keep_alive(struct watchdog *wdt)
  90 +{
  91 +       struct at91sam9_wdt *at91wdt = to_at91sam9_wdt(wdt);
  92 +
  93 +       wdt_write(at91wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  94 +}
  95 +
  96 +static int at91sam9_wdt_settimeout(struct watchdog *wdt, unsigned int timeout)
  97 +{
  98 +       struct at91sam9_wdt *at91wdt = to_at91sam9_wdt(wdt);
  99 +       unsigned int reg;
 100 +       unsigned int mr;
 101 +
 102 +       /* Check if disabled */
 103 +       mr = wdt_read(at91wdt, AT91_WDT_MR);
 104 +       if (mr & AT91_WDT_WDDIS) {
 105 +               pr_err("sorry, watchdog is disabled\n");
 106 +               return -EIO;
 107 +       }
 108 +
 109 +       if (!timeout) {
 110 +               wdt_write(at91wdt, AT91_WDT_MR, AT91_WDT_WDDIS);
 111 +               return 0;
 112 +       }
 113 +
 114 +       /*
 115 +        * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
 116 +        *
 117 +        * Since WDV is a 12-bit counter, the maximum period is
 118 +        * 4096 / 256 = 16 seconds.
 119 +        */
 120 +       reg = AT91_WDT_WDRSTEN  /* causes watchdog reset */
 121 +               /* | AT91_WDT_WDRPROC   causes processor reset only */
 122 +               | AT91_WDT_WDDBGHLT     /* disabled in debug mode */
 123 +               | AT91_WDT_WDD          /* restart at any time */
 124 +               | (timeout & AT91_WDT_WDV);  /* timer value */
 125 +       wdt_write(at91wdt, AT91_WDT_MR, reg);
 126 +
 127 +       return 0;
 128 +}
 129 +
 130 +static int at91sam9_wdt_probe(struct device_d *dev)
 131 +{
 132 +       struct at91sam9_wdt *priv;
 133 +       struct watchdog *wdt;
 134 +       int ret;
 135 +       unsigned int mr;
 136 +
 137 +       priv = xzalloc(sizeof(struct at91sam9_wdt));
 138 +       priv->base = dev_request_mem_region(dev, 0);
 139 +       wdt = &priv->wdt;
 140 +
 141 +       wdt->set_timeout = at91sam9_wdt_settimeout;
 142 +       wdt->keep_alive = at91sam9_wdt_keep_alive;
 143 +
 144 +       /* Check if disabled */
 145 +       mr = wdt_read(priv, AT91_WDT_MR);
 146 +       if (mr & AT91_WDT_WDDIS) {
 147 +               dev_err(dev, "sorry, watchdog is disabled\n");
 148 +               ret = -EIO;
 149 +               goto err;
 150 +       }
 151 +
 152 +       ret = watchdog_register(wdt);
 153 +       if (ret != 0)
 154 +               goto err;
 155 +
 156 +       dev->priv = priv;
 157 +       return 0;
 158 +
 159 +err:
 160 +       free(priv);
 161 +       return ret;
 162 +}
 163 +
 164 +static void at91sam9_wdt_remove(struct device_d *dev)
 165 +{
 166 +       struct at91sam9_wdt *priv= dev->priv;
 167 +       watchdog_deregister(&priv->wdt);
 168 +       free(priv);
 169 +}
 170 +
 171 +static struct driver_d at91sam9_wdt_driver = {
 172 +       .name   = "at91sam9_wdt",
 173 +       .probe  = at91sam9_wdt_probe,
 174 +       .remove = at91sam9_wdt_remove,
 175 +};
 176 +
 177 +static int at91sam9_wdt_init(void)
 178 +{
 179 +       return platform_driver_register(&at91sam9_wdt_driver);
 180 +}
 181 +coredevice_initcall(at91sam9_wdt_init);
 182 diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
 183 new file mode 100644
 184 index 0000000..2b68c1a
 185 --- /dev/null
 186 +++ b/drivers/watchdog/at91sam9_wdt.h
 187 @@ -0,0 +1,38 @@
 188 +/*
 189 + * drivers/watchdog/at91sam9_wdt.h
 190 + *
 191 + * Copyright (C) 2007 Andrew Victor
 192 + * Copyright (C) 2007 Atmel Corporation.
 193 + *
 194 + * Watchdog Timer (WDT) - System peripherals regsters.
 195 + * Based on AT91SAM9261 datasheet revision D.
 196 + *
 197 + * This program is free software; you can redistribute it and/or modify
 198 + * it under the terms of the GNU General Public License as published by
 199 + * the Free Software Foundation; either version 2 of the License, or
 200 + * (at your option) any later version.
 201 + */
 202 +
 203 +#ifndef AT91_WDT_H
 204 +#define AT91_WDT_H
 205 +
 206 +#define AT91_WDT_CR            0x00                    /* Watchdog Control Register */
 207 +#define                AT91_WDT_WDRSTT         (1    << 0)             /* Restart */
 208 +#define                AT91_WDT_KEY            (0xa5 << 24)            /* KEY Password */
 209 +
 210 +#define AT91_WDT_MR            0x04                    /* Watchdog Mode Register */
 211 +#define                AT91_WDT_WDV            (0xfff << 0)            /* Counter Value */
 212 +#define                AT91_WDT_WDFIEN         (1     << 12)           /* Fault Interrupt Enable */
 213 +#define                AT91_WDT_WDRSTEN        (1     << 13)           /* Reset Processor */
 214 +#define                AT91_WDT_WDRPROC        (1     << 14)           /* Timer Restart */
 215 +#define                AT91_WDT_WDDIS          (1     << 15)           /* Watchdog Disable */
 216 +#define                AT91_WDT_WDD            (0xfff << 16)           /* Delta Value */
 217 +#define                AT91_WDT_WDDBGHLT       (1     << 28)           /* Debug Halt */
 218 +#define                AT91_WDT_WDIDLEHLT      (1     << 29)           /* Idle Halt */
 219 +
 220 +#define AT91_WDT_SR            0x08                    /* Watchdog Status Register */
 221 +#define                AT91_WDT_WDUNF          (1 << 0)                /* Watchdog Underflow */
 222 +#define                AT91_WDT_WDERR          (1 << 1)                /* Watchdog Error */
 223 +
 224 +
 225 +#endif
 226 --
 227 1.8.1.4
 228