cirros-testvm/src-cirros/buildroot-2015.05/board/calao/usb-a9263/at91bootstrap-1.16-usb-a9263.patch

   1 From 74796655212d321f50ab89e8c5570245901f4cba Mon Sep 17 00:00:00 2001
   2 From: Gregory Hermant <gregory.hermant@calao-systems.com>
   3 Date: Thu, 5 Jul 2012 18:44:07 +0200
   4 Subject: [PATCH] Add support for the Calao-systems USB-A9263
   5
   6
   7 Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
   8 ---
   9  board/usb_a9263/dataflash/Makefile    |  115 +++++++++++++
  10  board/usb_a9263/dataflash/usb-a9263.h |   97 +++++++++++
  11  board/usb_a9263/nandflash/Makefile    |  117 ++++++++++++++
  12  board/usb_a9263/nandflash/usb-a9263.h |  116 +++++++++++++
  13  board/usb_a9263/usb_a9263.c           |  285 +++++++++++++++++++++++++++++++++
  14  crt0_gnu.S                            |    7 +
  15  driver/dataflash.c                    |    6 +-
  16  include/part.h                        |    6 +-
  17  8 files changed, 745 insertions(+), 4 deletions(-)
  18  create mode 100644 board/usb_a9263/dataflash/Makefile
  19  create mode 100644 board/usb_a9263/dataflash/usb-a9263.h
  20  create mode 100644 board/usb_a9263/nandflash/Makefile
  21  create mode 100644 board/usb_a9263/nandflash/usb-a9263.h
  22  create mode 100644 board/usb_a9263/usb_a9263.c
  23
  24 diff --git a/board/usb_a9263/dataflash/Makefile b/board/usb_a9263/dataflash/Makefile
  25 new file mode 100644
  26 index 0000000..332685e
  27 --- /dev/null
  28 +++ b/board/usb_a9263/dataflash/Makefile
  29 @@ -0,0 +1,115 @@
  30 +# TODO: set this appropriately for your local toolchain
  31 +#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
  32 +CROSS_COMPILE=arm-elf-
  33 +#CROSS_COMPILE = arm-softfloat-linux-gnu-
  34 +
  35 +TOOLCHAIN=gcc
  36 +
  37 +BOOTSTRAP_PATH=../../..
  38 +
  39 +# DataFlashBoot Configuration for USB-A9263
  40 +
  41 +# Target name (case sensitive!!!)
  42 +TARGET=AT91SAM9263
  43 +# Board name (case sensitive!!!)
  44 +BOARD=usb_a9263
  45 +# Link Address and Top_of_Memory
  46 +LINK_ADDR=0x300000
  47 +TOP_OF_MEMORY=0x314000
  48 +# Name of current directory
  49 +PROJECT=dataflash
  50 +
  51 +ifndef BOOT_NAME
  52 +BOOT_NAME=$(PROJECT)_$(BOARD)
  53 +endif
  54 +
  55 +INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
  56 +
  57 +ifeq ($(TOOLCHAIN), gcc)
  58 +
  59 +AS=$(CROSS_COMPILE)gcc
  60 +CC=$(CROSS_COMPILE)gcc
  61 +LD=$(CROSS_COMPILE)gcc
  62 +NM= $(CROSS_COMPILE)nm
  63 +SIZE=$(CROSS_COMPILE)size
  64 +OBJCOPY=$(CROSS_COMPILE)objcopy
  65 +OBJDUMP=$(CROSS_COMPILE)objdump
  66 +CCFLAGS=-g -mcpu=arm9 -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
  67 +ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
  68 +
  69 +# Linker flags.
  70 +#  -Wl,...:     tell GCC to pass this to linker.
  71 +#    -Map:      create map file
  72 +#    --cref:    add cross reference to map file
  73 +LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
  74 +LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
  75 +OBJS=crt0_gnu.o
  76 +
  77 +endif
  78 +
  79 +OBJS+=\
  80 +       $(BOARD).o \
  81 +       main.o \
  82 +       gpio.o \
  83 +       pmc.o \
  84 +       debug.o \
  85 +       sdramc.o \
  86 +       dataflash.o \
  87 +       _udivsi3.o \
  88 +       _umodsi3.o \
  89 +       div0.o \
  90 +       udiv.o \
  91 +       string.o
  92 +
  93 +rebuild: clean all
  94 +
  95 +all:   $(BOOT_NAME)
  96 +
  97 +ifeq ($(TOOLCHAIN), gcc)
  98 +$(BOOT_NAME): $(OBJS)
  99 +       $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
 100 +       $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
 101 +endif
 102 +
 103 +
 104 +$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
 105 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
 106 +
 107 +main.o: $(BOOTSTRAP_PATH)/main.c
 108 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
 109 +
 110 +gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
 111 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
 112 +
 113 +pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c
 114 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
 115 +
 116 +debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
 117 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
 118 +
 119 +sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c
 120 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
 121 +
 122 +dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c
 123 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
 124 +
 125 +crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
 126 +       $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
 127 +
 128 +div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c
 129 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
 130 +
 131 +string.o:  $(BOOTSTRAP_PATH)/lib/string.c
 132 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
 133 +
 134 +udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c
 135 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
 136 +
 137 +_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
 138 +       $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
 139 +
 140 +_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
 141 +       $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
 142 +
 143 +clean:
 144 +       rm -f *.o *.bin *.elf *.map
 145 diff --git a/board/usb_a9263/dataflash/usb-a9263.h b/board/usb_a9263/dataflash/usb-a9263.h
 146 new file mode 100644
 147 index 0000000..40a3af8
 148 --- /dev/null
 149 +++ b/board/usb_a9263/dataflash/usb-a9263.h
 150 @@ -0,0 +1,97 @@
 151 +/* ----------------------------------------------------------------------------
 152 + *         ATMEL Microcontroller Software Support  -  ROUSSET  -
 153 + * ----------------------------------------------------------------------------
 154 + * Copyright (c) 2006, Atmel Corporation
 155 +
 156 + * All rights reserved.
 157 + *
 158 + * Redistribution and use in source and binary forms, with or without
 159 + * modification, are permitted provided that the following conditions are met:
 160 + *
 161 + * - Redistributions of source code must retain the above copyright notice,
 162 + * this list of conditions and the disclaimer below.
 163 + *
 164 + * Atmel's name may not be used to endorse or promote products derived from
 165 + * this software without specific prior written permission.
 166 + *
 167 + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
 168 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 169 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 170 + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 171 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 172 + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 173 + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 174 + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 175 + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 176 + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 177 + * ----------------------------------------------------------------------------
 178 + * File Name           : usb-a9263.h
 179 + * Object              :
 180 + * Creation            : GH Jun 28th 2012
 181 + *-----------------------------------------------------------------------------
 182 + */
 183 +#ifndef _USB_A9263_H
 184 +#define _USB_A9263_H
 185 +
 186 +/* ******************************************************************* */
 187 +/* PMC Settings                                                        */
 188 +/*                                                                     */
 189 +/* The main oscillator is enabled as soon as possible in the c_startup */
 190 +/* and MCK is switched on the main oscillator.                         */
 191 +/* PLL initialization is done later in the hw_init() function          */
 192 +/* ******************************************************************* */
 193 +#define MASTER_CLOCK           (180000000/2)
 194 +#define PLL_LOCK_TIMEOUT       1000000
 195 +
 196 +#define PLLA_SETTINGS  0x20593F06
 197 +#define PLLB_SETTINGS  0x10483F0E
 198 +
 199 +/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
 200 +#define MCKR_SETTINGS          (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
 201 +#define MCKR_CSS_SETTINGS      (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
 202 +
 203 +/* ******************************************************************* */
 204 +/* DataFlash Settings                                                  */
 205 +/*                                                                     */
 206 +/* ******************************************************************* */
 207 +#define AT91C_BASE_SPI AT91C_BASE_SPI0
 208 +#define AT91C_ID_SPI   AT91C_ID_SPI0
 209 +
 210 +/* SPI CLOCK */
 211 +#define AT91C_SPI_CLK           8000000
 212 +/* AC characteristics */
 213 +/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
 214 +#define DATAFLASH_TCSS         (0x1a << 16)    /* 250ns min (tCSS) <=> 12/48000000 = 250ns */
 215 +#define DATAFLASH_TCHS         (0x1 << 24)     /* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
 216 +
 217 +#define DF_CS_SETTINGS                 (AT91C_SPI_NCPHA | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | ((MASTER_CLOCK / AT91C_SPI_CLK) << 8))
 218 +
 219 +/* ******************************************************************* */
 220 +/* SDRAMC Settings                                                     */
 221 +/*                                                                     */
 222 +/* ******************************************************************* */
 223 +#define AT91C_BASE_SDRAMC      AT91C_BASE_SDRAMC0
 224 +#define AT91C_EBI_SDRAM                AT91C_EBI0_SDRAM
 225 +
 226 +/* ******************************************************************* */
 227 +/* BootStrap Settings                                                  */
 228 +/*                                                                     */
 229 +/* ******************************************************************* */
 230 +#define AT91C_SPI_PCS_DATAFLASH                AT91C_SPI_PCS0_DATAFLASH        /* Boot on SPI NCS0 */
 231 +
 232 +#define IMG_ADDRESS                    0x4000                  /* Image Address in DataFlash */
 233 +#define        IMG_SIZE                        0x40000                 /* Image Size in DataFlash    */
 234 +
 235 +#define MACH_TYPE                      0x6AE                   /* USB-A9263 */
 236 +#define JUMP_ADDR                      0x23F00000              /* Final Jump Address         */
 237 +
 238 +/* ******************************************************************* */
 239 +/* Application Settings                                                */
 240 +/* ******************************************************************* */
 241 +#define CFG_HW_INIT
 242 +#define CFG_SDRAM
 243 +#undef CFG_DEBUG
 244 +
 245 +#define CFG_DATAFLASH
 246 +
 247 +#endif /* _USB_A9263_H */
 248 diff --git a/board/usb_a9263/nandflash/Makefile b/board/usb_a9263/nandflash/Makefile
 249 new file mode 100644
 250 index 0000000..c453098
 251 --- /dev/null
 252 +++ b/board/usb_a9263/nandflash/Makefile
 253 @@ -0,0 +1,117 @@
 254 +# TODO: set this appropriately for your local toolchain
 255 +#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
 256 +CROSS_COMPILE=arm-elf-
 257 +
 258 +TOOLCHAIN=gcc
 259 +
 260 +BOOTSTRAP_PATH=../../..
 261 +
 262 +# NandFlashBoot Configuration for USB-A9263
 263 +
 264 +# Target name (case sensitive!!!)
 265 +TARGET=AT91SAM9263
 266 +# Board name (case sensitive!!!)
 267 +BOARD=usb_a9263
 268 +# Link Address and Top_of_Memory
 269 +LINK_ADDR=0x300000
 270 +TOP_OF_MEMORY=0x314000
 271 +# Name of current directory
 272 +PROJECT=nandflash
 273 +
 274 +ifndef BOOT_NAME
 275 +BOOT_NAME=$(PROJECT)_$(BOARD)
 276 +endif
 277 +
 278 +INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
 279 +
 280 +ifeq ($(TOOLCHAIN), gcc)
 281 +
 282 +AS=$(CROSS_COMPILE)gcc
 283 +CC=$(CROSS_COMPILE)gcc
 284 +LD=$(CROSS_COMPILE)gcc
 285 +NM= $(CROSS_COMPILE)nm
 286 +SIZE=$(CROSS_COMPILE)size
 287 +OBJCOPY=$(CROSS_COMPILE)objcopy
 288 +OBJDUMP=$(CROSS_COMPILE)objdump
 289 +CCFLAGS=-g -mcpu=arm9 -O0 -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
 290 +ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
 291 +
 292 +# Linker flags.
 293 +#  -Wl,...:     tell GCC to pass this to linker.
 294 +#    -Map:      create map file
 295 +#    --cref:    add cross reference to map file
 296 +LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
 297 +LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
 298 +OBJS=crt0_gnu.o
 299 +
 300 +endif
 301 +
 302 +OBJS+=\
 303 +       $(BOARD).o \
 304 +       main.o \
 305 +       gpio.o \
 306 +       pmc.o \
 307 +       debug.o \
 308 +       sdramc.o \
 309 +       nandflash.o \
 310 +       _udivsi3.o \
 311 +       _umodsi3.o \
 312 +       div0.o \
 313 +       udiv.o \
 314 +       string.o
 315 +
 316 +rebuild: clean all
 317 +
 318 +all:   $(BOOT_NAME)
 319 +
 320 +ifeq ($(TOOLCHAIN), gcc)
 321 +$(BOOT_NAME): $(OBJS)
 322 +       $(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
 323 +       $(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
 324 +endif
 325 +
 326 +
 327 +$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
 328 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
 329 +
 330 +main.o: $(BOOTSTRAP_PATH)/main.c
 331 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
 332 +
 333 +gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c
 334 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
 335 +
 336 +pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c
 337 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
 338 +
 339 +debug.o: $(BOOTSTRAP_PATH)/driver/debug.c
 340 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
 341 +
 342 +sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c
 343 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
 344 +
 345 +dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c
 346 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
 347 +
 348 +nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c
 349 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
 350 +
 351 +crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
 352 +       $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
 353 +
 354 +div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c
 355 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
 356 +
 357 +string.o:  $(BOOTSTRAP_PATH)/lib/string.c
 358 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
 359 +
 360 +udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c
 361 +       $(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
 362 +
 363 +_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
 364 +       $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
 365 +
 366 +_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
 367 +       $(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
 368 +
 369 +clean:
 370 +       rm -f *.o *.bin *.elf *.map
 371 diff --git a/board/usb_a9263/nandflash/usb-a9263.h b/board/usb_a9263/nandflash/usb-a9263.h
 372 new file mode 100644
 373 index 0000000..24e2cf1
 374 --- /dev/null
 375 +++ b/board/usb_a9263/nandflash/usb-a9263.h
 376 @@ -0,0 +1,116 @@
 377 +/* ----------------------------------------------------------------------------
 378 + *         ATMEL Microcontroller Software Support  -  ROUSSET  -
 379 + * ----------------------------------------------------------------------------
 380 + * Copyright (c) 2006, Atmel Corporation
 381 +
 382 + * All rights reserved.
 383 + *
 384 + * Redistribution and use in source and binary forms, with or without
 385 + * modification, are permitted provided that the following conditions are met:
 386 + *
 387 + * - Redistributions of source code must retain the above copyright notice,
 388 + * this list of conditions and the disclaimer below.
 389 + *
 390 + * Atmel's name may not be used to endorse or promote products derived from
 391 + * this software without specific prior written permission.
 392 + *
 393 + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
 394 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 395 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 396 + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 397 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 398 + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 399 + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 400 + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 401 + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 402 + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 403 + * ----------------------------------------------------------------------------
 404 + * File Name           : usb-a9263.h
 405 + * Object              :
 406 + * Creation            : GH Jun 28th 2012
 407 + *-----------------------------------------------------------------------------
 408 + */
 409 +#ifndef _USB_A9263_H
 410 +#define _USB_A9263_H
 411 +
 412 +/* ******************************************************************* */
 413 +/* PMC Settings                                                        */
 414 +/*                                                                     */
 415 +/* The main oscillator is enabled as soon as possible in the c_startup */
 416 +/* and MCK is switched on the main oscillator.                         */
 417 +/* PLL initialization is done later in the hw_init() function          */
 418 +/* ******************************************************************* */
 419 +#define MASTER_CLOCK           (180000000/2)
 420 +#define PLL_LOCK_TIMEOUT       1000000
 421 +
 422 +#define PLLA_SETTINGS  0x20593F06
 423 +#define PLLB_SETTINGS  0x10483F0E
 424 +
 425 +/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
 426 +#define MCKR_SETTINGS          (AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
 427 +#define MCKR_CSS_SETTINGS      (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
 428 +
 429 +/* ******************************************************************* */
 430 +/* NandFlash Settings                                                  */
 431 +/*                                                                     */
 432 +/* ******************************************************************* */
 433 +#define AT91C_SMARTMEDIA_BASE  0x40000000
 434 +
 435 +#define AT91_SMART_MEDIA_ALE    (1 << 21)      /* our ALE is AD21 */
 436 +#define AT91_SMART_MEDIA_CLE    (1 << 22)      /* our CLE is AD22 */
 437 +
 438 +#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_SODR = AT91C_PIO_PD15;} while(0)
 439 +#define NAND_ENABLE_CE()  do { *(volatile unsigned int *)AT91C_PIOD_CODR = AT91C_PIO_PD15;} while(0)
 440 +#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOA_PDSR & AT91C_PIO_PA22))
 441 +
 442 +/* ******************************************************************* */
 443 +/* SDRAMC Settings                                                     */
 444 +/*                                                                     */
 445 +/* ******************************************************************* */
 446 +#define AT91C_BASE_SDRAMC      AT91C_BASE_SDRAMC0
 447 +#define AT91C_EBI_SDRAM                AT91C_EBI0_SDRAM
 448 +
 449 +/* ******************************************************************** */
 450 +/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000. */
 451 +/* Please refer to SMC section in AT91SAM9x datasheet to learn how     */
 452 +/* to generate these values.                                           */
 453 +/* ******************************************************************** */
 454 +#define AT91C_SM_NWE_SETUP     (1 << 0)
 455 +#define AT91C_SM_NCS_WR_SETUP  (0 << 8)
 456 +#define AT91C_SM_NRD_SETUP     (1 << 16)
 457 +#define AT91C_SM_NCS_RD_SETUP  (0 << 24)
 458 +
 459 +#define AT91C_SM_NWE_PULSE     (3 << 0)
 460 +#define AT91C_SM_NCS_WR_PULSE  (3 << 8)
 461 +#define AT91C_SM_NRD_PULSE     (3 << 16)
 462 +#define AT91C_SM_NCS_RD_PULSE  (3 << 24)
 463 +
 464 +#define AT91C_SM_NWE_CYCLE     (5 << 0)
 465 +#define AT91C_SM_NRD_CYCLE     (5 << 16)
 466 +
 467 +#define AT91C_SM_TDF           (2 << 16)
 468 +
 469 +/* ******************************************************************* */
 470 +/* BootStrap Settings                                                  */
 471 +/*                                                                     */
 472 +/* ******************************************************************* */
 473 +#define IMG_ADDRESS    0x20000         /* Image Address in NandFlash */
 474 +#define        IMG_SIZE        0x40000         /* Image Size in NandFlash    */
 475 +
 476 +#define MACH_TYPE       0x6AE                  /* USB-A9263 */
 477 +#define JUMP_ADDR      0x23F00000      /* Final Jump Address         */
 478 +
 479 +/* ******************************************************************* */
 480 +/* Application Settings                                                */
 481 +/* ******************************************************************* */
 482 +#undef CFG_DEBUG
 483 +#undef CFG_DATAFLASH
 484 +
 485 +#define CFG_NANDFLASH
 486 +#undef NANDFLASH_SMALL_BLOCKS  /* NANDFLASH_LARGE_BLOCKS used instead */
 487 +
 488 +#define CFG_HW_INIT
 489 +#define CFG_SDRAM
 490 +
 491 +
 492 +#endif /* _USB_A9263_H */
 493 diff --git a/board/usb_a9263/usb_a9263.c b/board/usb_a9263/usb_a9263.c
 494 new file mode 100644
 495 index 0000000..5630f99
 496 --- /dev/null
 497 +++ b/board/usb_a9263/usb_a9263.c
 498 @@ -0,0 +1,285 @@
 499 +/* ----------------------------------------------------------------------------
 500 + *         ATMEL Microcontroller Software Support  -  ROUSSET  -
 501 + * ----------------------------------------------------------------------------
 502 + * Copyright (c) 2006, Atmel Corporation
 503 +
 504 + * All rights reserved.
 505 + *
 506 + * Redistribution and use in source and binary forms, with or without
 507 + * modification, are permitted provided that the following conditions are met:
 508 + *
 509 + * - Redistributions of source code must retain the above copyright notice,
 510 + * this list of conditions and the disclaiimer below.
 511 + *
 512 + * Atmel's name may not be used to endorse or promote products derived from
 513 + * this software without specific prior written permission.
 514 + *
 515 + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
 516 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 517 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 518 + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 519 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 520 + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 521 + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 522 + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 523 + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 524 + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 525 + * ----------------------------------------------------------------------------
 526 + * File Name           : usb_a9263.c
 527 + * Object              :
 528 + * Creation            : GH Jun 28th 2012
 529 + *-----------------------------------------------------------------------------
 530 + */
 531 +#include "../../include/part.h"
 532 +#include "../../include/gpio.h"
 533 +#include "../../include/pmc.h"
 534 +#include "../../include/debug.h"
 535 +#include "../../include/sdramc.h"
 536 +#include "../../include/main.h"
 537 +#ifdef CFG_NANDFLASH
 538 +#include "../../include/nandflash.h"
 539 +#endif
 540 +#ifdef CFG_DATAFLASH
 541 +#include "../../include/dataflash.h"
 542 +#endif
 543 +
 544 +static inline unsigned int get_cp15(void)
 545 +{
 546 +       unsigned int value;
 547 +       __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
 548 +       return value;
 549 +}
 550 +
 551 +static inline void set_cp15(unsigned int value)
 552 +{
 553 +       __asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
 554 +}
 555 +
 556 +
 557 +#ifdef CFG_HW_INIT
 558 +/*---------------------------------------------------------------------------- */
 559 +/* \fn    hw_init                                                             */
 560 +/* \brief This function performs very low level HW initialization             */
 561 +/* This function is invoked as soon as possible during the c_startup          */
 562 +/* The bss segment must be initialized                                        */
 563 +/*---------------------------------------------------------------------------- */
 564 +void hw_init(void)
 565 +{
 566 +       /* Configure PIOs */
 567 +       const struct pio_desc hw_pio[] = {
 568 +#ifdef CFG_DEBUG
 569 +               {"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
 570 +               {"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
 571 +#endif
 572 +               {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
 573 +       };
 574 +
 575 +       /* Disable watchdog */
 576 +       writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
 577 +
 578 +       /* At this stage the main oscillator is supposed to be enabled
 579 +        * PCK = MCK = MOSC */
 580 +
 581 +       /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
 582 +       pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
 583 +
 584 +       /* PCK = PLLA = 2 * MCK */
 585 +       pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
 586 +       /* Switch MCK on PLLA output */
 587 +       pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
 588 +
 589 +
 590 +       /* Configure PLLB */
 591 +       pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
 592 +
 593 +       /* Configure the PIO controller to output PCK0 */
 594 +       pio_setup(hw_pio);
 595 +
 596 +       /* Configure the EBI0 Slave Slot Cycle to 64 */
 597 +       writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG4)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG4));
 598 +
 599 +#ifdef CFG_DEBUG
 600 +       /* Enable Debug messages on the DBGU */
 601 +       dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
 602 +       dbg_print("Start AT91Bootstrap...\n\r");
 603 +#endif /* CFG_DEBUG */
 604 +
 605 +#ifdef CFG_SDRAM
 606 +       /* Initialize the matrix */
 607 +       /* VDDIOMSEL = 1 -> Memories are 3.3V powered */
 608 +       writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | (1 << 16) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBI0CSA);
 609 +
 610 +       /* Configure SDRAM Controller */
 611 +       sdram_init(     AT91C_SDRAMC_NC_9  |
 612 +                               AT91C_SDRAMC_NR_13 |
 613 +                               AT91C_SDRAMC_CAS_2 |
 614 +                               AT91C_SDRAMC_NB_4_BANKS |
 615 +                               AT91C_SDRAMC_DBW_32_BITS |
 616 +                               AT91C_SDRAMC_TWR_2 |
 617 +                               AT91C_SDRAMC_TRC_7 |
 618 +                               AT91C_SDRAMC_TRP_2 |
 619 +                               AT91C_SDRAMC_TRCD_2 |
 620 +                               AT91C_SDRAMC_TRAS_5 |
 621 +                               AT91C_SDRAMC_TXSR_8,            /* Control Register       */
 622 +                               (MASTER_CLOCK * 7)/1000000,     /* Refresh Timer Register */
 623 +                               AT91C_SDRAMC_MD_SDRAM);         /* SDRAM (no low power)   */
 624 +#endif /* CFG_SDRAM */
 625 +}
 626 +#endif /* CFG_HW_INIT */
 627 +
 628 +
 629 +#ifdef CFG_SDRAM
 630 +//*----------------------------------------------------------------------------
 631 +//* \fn    sdramc_hw_init
 632 +//* \brief This function performs SDRAMC HW initialization
 633 +//*----------------------------------------------------------------------------*/
 634 +void sdramc_hw_init(void)
 635 +{
 636 +       /* Configure PIOs */
 637 +       const struct pio_desc sdramc_pio[] = {
 638 +               {"D16", AT91C_PIN_PD(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
 639 +               {"D17", AT91C_PIN_PD(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
 640 +               {"D18", AT91C_PIN_PD(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
 641 +               {"D19", AT91C_PIN_PD(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
 642 +               {"D20", AT91C_PIN_PD(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
 643 +               {"D21", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
 644 +               {"D22", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
 645 +               {"D23", AT91C_PIN_PD(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
 646 +               {"D24", AT91C_PIN_PD(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
 647 +               {"D25", AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
 648 +               {"D26", AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
 649 +               {"D27", AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
 650 +               {"D28", AT91C_PIN_PD(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
 651 +               {"D29", AT91C_PIN_PD(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
 652 +               {"D30", AT91C_PIN_PD(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
 653 +               {"D31", AT91C_PIN_PD(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
 654 +               {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
 655 +       };
 656 +
 657 +       /* Configure the SDRAMC PIO controller */
 658 +       pio_setup(sdramc_pio);
 659 +}
 660 +#endif
 661 +
 662 +#ifdef CFG_DATAFLASH
 663 +/*------------------------------------------------------------------------------*/
 664 +/* \fn    df_recovery                                                          */
 665 +/* \brief This function erases DataFlash Page 0 if USER PB is pressed          */
 666 +/*        during boot sequence                                                 */
 667 +/*------------------------------------------------------------------------------*/
 668 +void df_recovery(AT91PS_DF pDf)
 669 +{
 670 +#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
 671 +       /* Configure PIOs */
 672 +       const struct pio_desc usrpb_pio[] = {
 673 +               {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
 674 +               {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
 675 +       };
 676 +
 677 +       /* Configure the PIO controller */
 678 +       writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
 679 +       pio_setup(usrpb_pio);
 680 +
 681 +       /* If USER PB is pressed during Boot sequence */
 682 +       /* Erase NandFlash block 0*/
 683 +       if ( !pio_get_value(AT91C_PIN_PB(10)) )
 684 +               df_page_erase(pDf, 0);
 685 +#endif
 686 +}
 687 +/*------------------------------------------------------------------------------*/
 688 +/* \fn    df_hw_init                                                           */
 689 +/* \brief This function performs DataFlash HW initialization                   */
 690 +/*------------------------------------------------------------------------------*/
 691 +void df_hw_init(void)
 692 +{
 693 +       /* Configure PIOs */
 694 +       const struct pio_desc df_pio[] = {
 695 +               {"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},
 696 +               {"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},
 697 +               {"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},
 698 +               {"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},
 699 +               {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
 700 +       };
 701 +
 702 +       /* Configure the PIO controller */
 703 +       pio_setup(df_pio);
 704 +}
 705 +#endif /* CFG_DATAFLASH */
 706 +
 707 +
 708 +#ifdef CFG_NANDFLASH
 709 +/*------------------------------------------------------------------------------*/
 710 +/* \fn    nand_recovery                                                                */
 711 +/* \brief This function erases NandFlash Block 0 if USER PB is pressed                 */
 712 +/*        during boot sequence                                                 */
 713 +/*------------------------------------------------------------------------------*/
 714 +static void nand_recovery(void)
 715 +{
 716 +       /* Configure PIOs */
 717 +       const struct pio_desc usrpb_pio[] = {
 718 +               {"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
 719 +               {(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
 720 +       };
 721 +
 722 +       /* Configure the PIO controller */
 723 +       writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
 724 +       pio_setup(usrpb_pio);
 725 +
 726 +       /* If USER PB is pressed during Boot sequence */
 727 +       /* Erase NandFlash block 0*/
 728 +       if (!pio_get_value(AT91C_PIN_PB(10)) )
 729 +               AT91F_NandEraseBlock0();
 730 +}
 731 +/*------------------------------------------------------------------------------*/
 732 +/* \fn    nandflash_hw_init                                                    */
 733 +/* \brief NandFlash HW init                                                    */
 734 +/*------------------------------------------------------------------------------*/
 735 +void nandflash_hw_init(void)
 736 +{
 737 +       /* Configure PIOs */
 738 +       const struct pio_desc nand_pio[] = {
 739 +               {"RDY_BSY", AT91C_PIN_PA(22), 0, PIO_PULLUP, PIO_INPUT},
 740 +               {"NANDCS",  AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT},
 741 +               {(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
 742 +       };
 743 +
 744 +       /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
 745 +       writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBI0CSA);
 746 +
 747 +       /* Configure SMC CS3 */
 748 +       writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC0 + SMC_SETUP3);
 749 +       writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC0 + SMC_PULSE3);
 750 +       writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)                                                , AT91C_BASE_SMC0 + SMC_CYCLE3);
 751 +       writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE |
 752 +               AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)                                                , AT91C_BASE_SMC0 + SMC_CTRL3);
 753 +
 754 +       /* Configure the PIO controller */
 755 +       writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
 756 +       writel((1 << AT91C_ID_PIOCDE), PMC_PCER + AT91C_BASE_PMC);
 757 +
 758 +       pio_setup(nand_pio);
 759 +
 760 +       nand_recovery();
 761 +}
 762 +
 763 +/*------------------------------------------------------------------------------*/
 764 +/* \fn    nandflash_cfg_16bits_dbw_init                                                */
 765 +/* \brief Configure SMC in 16 bits mode                                                */
 766 +/*------------------------------------------------------------------------------*/
 767 +void nandflash_cfg_16bits_dbw_init(void)
 768 +{
 769 +       writel(readl(AT91C_BASE_SMC0 + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
 770 +}
 771 +
 772 +/*------------------------------------------------------------------------------*/
 773 +/* \fn    nandflash_cfg_8bits_dbw_init                                         */
 774 +/* \brief Configure SMC in 8 bits mode                                         */
 775 +/*------------------------------------------------------------------------------*/
 776 +void nandflash_cfg_8bits_dbw_init(void)
 777 +{
 778 +       writel((readl(AT91C_BASE_SMC0 + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
 779 +}
 780 +
 781 +#endif /* #ifdef CFG_NANDFLASH */
 782 +
 783 +
 784 diff --git a/crt0_gnu.S b/crt0_gnu.S
 785 index 042b617..002feef 100644
 786 --- a/crt0_gnu.S
 787 +++ b/crt0_gnu.S
 788 @@ -106,6 +106,13 @@ _relocate_to_sram:
 789  #endif /* CFG_NORFLASH */
 790
 791  _setup_clocks:
 792 +/* Test if main osc is bypassed */
 793 +       ldr     r0,=AT91C_PMC_MOR
 794 +       ldr     r1, [r0]
 795 +       ldr     r2,=AT91C_CKGR_OSCBYPASS
 796 +       ands    r1, r1, r2
 797 +       bne     _init_data      /* branch if OSCBYPASS=1 */
 798 +
 799  /* Test if main oscillator is enabled */
 800         ldr     r0,=AT91C_PMC_SR
 801         ldr     r1, [r0]
 802 diff --git a/driver/dataflash.c b/driver/dataflash.c
 803 index e28e49e..4de295a 100644
 804 --- a/driver/dataflash.c
 805 +++ b/driver/dataflash.c
 806 @@ -293,14 +293,14 @@ static int df_init (AT91PS_DF pDf)
 807                         pDf->dfDescription.pages_size = 264;
 808                         pDf->dfDescription.page_offset = 9;
 809                         break;
 810 -
 811 +*/
 812                 case AT45DB021B:
 813                         pDf->dfDescription.pages_number = 1024;
 814                         pDf->dfDescription.pages_size = 264;
 815                         pDf->dfDescription.page_offset = 9;
 816                         break;
 817
 818 -               case AT45DB041B:
 819 +/*             case AT45DB041B:
 820                         pDf->dfDescription.pages_number = 2048;
 821                         pDf->dfDescription.pages_size = 264;
 822                         pDf->dfDescription.page_offset = 9;
 823 @@ -373,7 +373,7 @@ int load_df(unsigned int pcs, unsigned int img_addr, unsigned int img_size, unsi
 824      if (!df_init(pDf))
 825          return -1;
 826
 827 -#if defined(AT91SAM9260) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
 828 +#if defined(AT91SAM9260) || defined(AT91SAM9263) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
 829      /* Test if a button has been pressed or not */
 830      /* Erase Page 0 to avoid infinite loop */
 831      df_recovery(pDf);
 832 diff --git a/include/part.h b/include/part.h
 833 index ba5985a..a1863d0 100644
 834 --- a/include/part.h
 835 +++ b/include/part.h
 836 @@ -61,7 +61,11 @@
 837
 838  #ifdef AT91SAM9263
 839  #include "AT91SAM9263_inc.h"
 840 -#include "at91sam9263ek.h"
 841 +       #ifdef at91sam9263ek
 842 +       #include "at91sam9263ek.h"
 843 +       #elif usb_a9263
 844 +       #include "usb-a9263.h"
 845 +       #endif
 846  #endif
 847
 848  #ifdef AT91CAP9
 849 --
 850 1.5.6.3
 851