1 From f642126aece222f6ff87d26c29f00e1b6c47e10a Mon Sep 17 00:00:00 2001
2 From: Blue Swirl <blauwirbel@gmail.com>
3 Date: Sun, 2 Sep 2012 07:33:32 +0000
4 Subject: [PATCH] target-s390x: split condition code helpers
6 Move condition code helpers to cc_helper.c.
8 Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
9 Signed-off-by: Alexander Graf <agraf@suse.de>
10 Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
12 target-s390x/Makefile.objs | 3 +-
13 target-s390x/cc_helper.c | 551 +++++++++++++++++++++++++++++++++++++++++++++
14 target-s390x/cpu.h | 3 +
15 target-s390x/op_helper.c | 522 +-----------------------------------------
16 4 files changed, 557 insertions(+), 522 deletions(-)
17 create mode 100644 target-s390x/cc_helper.c
19 diff --git a/target-s390x/Makefile.objs b/target-s390x/Makefile.objs
20 index 23b3bd9..f9437d6 100644
21 --- a/target-s390x/Makefile.objs
22 +++ b/target-s390x/Makefile.objs
24 obj-y += translate.o op_helper.o helper.o cpu.o interrupt.o
25 -obj-y += fpu_helper.o
26 +obj-y += fpu_helper.o cc_helper.o
27 obj-$(CONFIG_SOFTMMU) += machine.o
28 obj-$(CONFIG_KVM) += kvm.o
30 $(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
31 $(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
32 +$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
33 diff --git a/target-s390x/cc_helper.c b/target-s390x/cc_helper.c
35 index 0000000..2ac1659
37 +++ b/target-s390x/cc_helper.c
40 + * S/390 condition code helper routines
42 + * Copyright (c) 2009 Ulrich Hecht
43 + * Copyright (c) 2009 Alexander Graf
45 + * This library is free software; you can redistribute it and/or
46 + * modify it under the terms of the GNU Lesser General Public
47 + * License as published by the Free Software Foundation; either
48 + * version 2 of the License, or (at your option) any later version.
50 + * This library is distributed in the hope that it will be useful,
51 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
52 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
53 + * Lesser General Public License for more details.
55 + * You should have received a copy of the GNU Lesser General Public
56 + * License along with this library; if not, see <http://www.gnu.org/licenses/>.
60 +#include "dyngen-exec.h"
63 +/* #define DEBUG_HELPER */
65 +#define HELPER_LOG(x...) qemu_log(x)
67 +#define HELPER_LOG(x...)
70 +static inline uint32_t cc_calc_ltgt_32(CPUS390XState *env, int32_t src,
75 + } else if (src < dst) {
82 +static inline uint32_t cc_calc_ltgt0_32(CPUS390XState *env, int32_t dst)
84 + return cc_calc_ltgt_32(env, dst, 0);
87 +static inline uint32_t cc_calc_ltgt_64(CPUS390XState *env, int64_t src,
92 + } else if (src < dst) {
99 +static inline uint32_t cc_calc_ltgt0_64(CPUS390XState *env, int64_t dst)
101 + return cc_calc_ltgt_64(env, dst, 0);
104 +static inline uint32_t cc_calc_ltugtu_32(CPUS390XState *env, uint32_t src,
109 + } else if (src < dst) {
116 +static inline uint32_t cc_calc_ltugtu_64(CPUS390XState *env, uint64_t src,
121 + } else if (src < dst) {
128 +static inline uint32_t cc_calc_tm_32(CPUS390XState *env, uint32_t val,
131 + uint16_t r = val & mask;
133 + HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__, val, mask);
134 + if (r == 0 || mask == 0) {
136 + } else if (r == mask) {
143 +/* set condition code for test under mask */
144 +static inline uint32_t cc_calc_tm_64(CPUS390XState *env, uint64_t val,
147 + uint16_t r = val & mask;
149 + HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__, val, mask, r);
150 + if (r == 0 || mask == 0) {
152 + } else if (r == mask) {
155 + while (!(mask & 0x8000)) {
159 + if (val & 0x8000) {
167 +static inline uint32_t cc_calc_nz(CPUS390XState *env, uint64_t dst)
172 +static inline uint32_t cc_calc_add_64(CPUS390XState *env, int64_t a1,
173 + int64_t a2, int64_t ar)
175 + if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
176 + return 3; /* overflow */
180 + } else if (ar > 0) {
188 +static inline uint32_t cc_calc_addu_64(CPUS390XState *env, uint64_t a1,
189 + uint64_t a2, uint64_t ar)
198 + if (ar < a1 || ar < a2) {
206 +static inline uint32_t cc_calc_sub_64(CPUS390XState *env, int64_t a1,
207 + int64_t a2, int64_t ar)
209 + if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
210 + return 3; /* overflow */
214 + } else if (ar > 0) {
222 +static inline uint32_t cc_calc_subu_64(CPUS390XState *env, uint64_t a1,
223 + uint64_t a2, uint64_t ar)
236 +static inline uint32_t cc_calc_abs_64(CPUS390XState *env, int64_t dst)
238 + if ((uint64_t)dst == 0x8000000000000000ULL) {
247 +static inline uint32_t cc_calc_nabs_64(CPUS390XState *env, int64_t dst)
252 +static inline uint32_t cc_calc_comp_64(CPUS390XState *env, int64_t dst)
254 + if ((uint64_t)dst == 0x8000000000000000ULL) {
256 + } else if (dst < 0) {
258 + } else if (dst > 0) {
266 +static inline uint32_t cc_calc_add_32(CPUS390XState *env, int32_t a1,
267 + int32_t a2, int32_t ar)
269 + if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
270 + return 3; /* overflow */
274 + } else if (ar > 0) {
282 +static inline uint32_t cc_calc_addu_32(CPUS390XState *env, uint32_t a1,
283 + uint32_t a2, uint32_t ar)
292 + if (ar < a1 || ar < a2) {
300 +static inline uint32_t cc_calc_sub_32(CPUS390XState *env, int32_t a1,
301 + int32_t a2, int32_t ar)
303 + if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
304 + return 3; /* overflow */
308 + } else if (ar > 0) {
316 +static inline uint32_t cc_calc_subu_32(CPUS390XState *env, uint32_t a1,
317 + uint32_t a2, uint32_t ar)
330 +static inline uint32_t cc_calc_abs_32(CPUS390XState *env, int32_t dst)
332 + if ((uint32_t)dst == 0x80000000UL) {
341 +static inline uint32_t cc_calc_nabs_32(CPUS390XState *env, int32_t dst)
346 +static inline uint32_t cc_calc_comp_32(CPUS390XState *env, int32_t dst)
348 + if ((uint32_t)dst == 0x80000000UL) {
350 + } else if (dst < 0) {
352 + } else if (dst > 0) {
359 +/* calculate condition code for insert character under mask insn */
360 +static inline uint32_t cc_calc_icm_32(CPUS390XState *env, uint32_t mask,
365 + HELPER_LOG("%s: mask 0x%x val %d\n", __func__, mask, val);
369 + } else if (val & 0x80000000) {
376 + if (!val || !mask) {
379 + while (mask != 1) {
392 +static inline uint32_t cc_calc_slag(CPUS390XState *env, uint64_t src,
395 + uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
398 + /* check if the sign bit stays the same */
399 + if (src & (1ULL << 63)) {
405 + if ((src & mask) != match) {
410 + r = ((src << shift) & ((1ULL << 63) - 1)) | (src & (1ULL << 63));
412 + if ((int64_t)r == 0) {
414 + } else if ((int64_t)r < 0) {
422 +static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
423 + uint64_t src, uint64_t dst, uint64_t vr)
432 + /* cc_op value _is_ cc */
435 + case CC_OP_LTGT0_32:
436 + r = cc_calc_ltgt0_32(env, dst);
438 + case CC_OP_LTGT0_64:
439 + r = cc_calc_ltgt0_64(env, dst);
441 + case CC_OP_LTGT_32:
442 + r = cc_calc_ltgt_32(env, src, dst);
444 + case CC_OP_LTGT_64:
445 + r = cc_calc_ltgt_64(env, src, dst);
447 + case CC_OP_LTUGTU_32:
448 + r = cc_calc_ltugtu_32(env, src, dst);
450 + case CC_OP_LTUGTU_64:
451 + r = cc_calc_ltugtu_64(env, src, dst);
454 + r = cc_calc_tm_32(env, src, dst);
457 + r = cc_calc_tm_64(env, src, dst);
460 + r = cc_calc_nz(env, dst);
463 + r = cc_calc_add_64(env, src, dst, vr);
465 + case CC_OP_ADDU_64:
466 + r = cc_calc_addu_64(env, src, dst, vr);
469 + r = cc_calc_sub_64(env, src, dst, vr);
471 + case CC_OP_SUBU_64:
472 + r = cc_calc_subu_64(env, src, dst, vr);
475 + r = cc_calc_abs_64(env, dst);
477 + case CC_OP_NABS_64:
478 + r = cc_calc_nabs_64(env, dst);
480 + case CC_OP_COMP_64:
481 + r = cc_calc_comp_64(env, dst);
485 + r = cc_calc_add_32(env, src, dst, vr);
487 + case CC_OP_ADDU_32:
488 + r = cc_calc_addu_32(env, src, dst, vr);
491 + r = cc_calc_sub_32(env, src, dst, vr);
493 + case CC_OP_SUBU_32:
494 + r = cc_calc_subu_32(env, src, dst, vr);
497 + r = cc_calc_abs_64(env, dst);
499 + case CC_OP_NABS_32:
500 + r = cc_calc_nabs_64(env, dst);
502 + case CC_OP_COMP_32:
503 + r = cc_calc_comp_32(env, dst);
507 + r = cc_calc_icm_32(env, src, dst);
510 + r = cc_calc_slag(env, src, dst);
513 + case CC_OP_LTGT_F32:
514 + r = set_cc_f32(src, dst);
516 + case CC_OP_LTGT_F64:
517 + r = set_cc_f64(src, dst);
520 + r = set_cc_nz_f32(dst);
523 + r = set_cc_nz_f64(dst);
527 + cpu_abort(env, "Unknown CC operation: %s\n", cc_name(cc_op));
530 + HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
531 + cc_name(cc_op), src, dst, vr, r);
535 +uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
538 + return do_calc_cc(env, cc_op, src, dst, vr);
541 +uint32_t HELPER(calc_cc)(uint32_t cc_op, uint64_t src, uint64_t dst,
544 + return do_calc_cc(env, cc_op, src, dst, vr);
547 +/* insert psw mask and condition code into r1 */
548 +void HELPER(ipm)(uint32_t cc, uint32_t r1)
550 + uint64_t r = env->regs[r1];
552 + r &= 0xffffffff00ffffffULL;
553 + r |= (cc << 28) | ((env->psw.mask >> 40) & 0xf);
555 + HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__,
556 + cc, env->psw.mask, r);
559 +#ifndef CONFIG_USER_ONLY
560 +void HELPER(load_psw)(uint64_t mask, uint64_t addr)
562 + load_psw(env, mask, addr);
563 + cpu_loop_exit(env);
566 +void HELPER(sacf)(uint64_t a1)
568 + HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1);
570 + switch (a1 & 0xf00) {
572 + env->psw.mask &= ~PSW_MASK_ASC;
573 + env->psw.mask |= PSW_ASC_PRIMARY;
576 + env->psw.mask &= ~PSW_MASK_ASC;
577 + env->psw.mask |= PSW_ASC_SECONDARY;
580 + env->psw.mask &= ~PSW_MASK_ASC;
581 + env->psw.mask |= PSW_ASC_HOME;
584 + qemu_log("unknown sacf mode: %" PRIx64 "\n", a1);
585 + program_interrupt(env, PGM_SPECIFICATION, 2);
590 diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
591 index b4620c5..97fde5e 100644
592 --- a/target-s390x/cpu.h
593 +++ b/target-s390x/cpu.h
594 @@ -1005,4 +1005,7 @@ uint32_t set_cc_f64(float64 v1, float64 v2);
595 uint32_t set_cc_nz_f32(float32 v);
596 uint32_t set_cc_nz_f64(float64 v);
599 +void program_interrupt(CPUS390XState *env, uint32_t code, int ilc);
602 diff --git a/target-s390x/op_helper.c b/target-s390x/op_helper.c
603 index 270bf14..eced890 100644
604 --- a/target-s390x/op_helper.c
605 +++ b/target-s390x/op_helper.c
606 @@ -779,18 +779,6 @@ uint32_t HELPER(icmh)(uint32_t r1, uint64_t address, uint32_t mask)
610 -/* insert psw mask and condition code into r1 */
611 -void HELPER(ipm)(uint32_t cc, uint32_t r1)
613 - uint64_t r = env->regs[r1];
615 - r &= 0xffffffff00ffffffULL;
616 - r |= (cc << 28) | ((env->psw.mask >> 40) & 0xf);
618 - HELPER_LOG("%s: cc %d psw.mask 0x%lx r1 0x%lx\n", __func__,
619 - cc, env->psw.mask, r);
622 /* load access registers r1 to r3 from memory at a2 */
623 void HELPER(lam)(uint32_t r1, uint64_t a2, uint32_t r3)
625 @@ -1038,483 +1026,6 @@ void HELPER(cksm)(uint32_t r1, uint32_t r2)
626 ((uint32_t)cksm + (cksm >> 32));
629 -static inline uint32_t cc_calc_ltgt_32(CPUS390XState *env, int32_t src,
634 - } else if (src < dst) {
641 -static inline uint32_t cc_calc_ltgt0_32(CPUS390XState *env, int32_t dst)
643 - return cc_calc_ltgt_32(env, dst, 0);
646 -static inline uint32_t cc_calc_ltgt_64(CPUS390XState *env, int64_t src,
651 - } else if (src < dst) {
658 -static inline uint32_t cc_calc_ltgt0_64(CPUS390XState *env, int64_t dst)
660 - return cc_calc_ltgt_64(env, dst, 0);
663 -static inline uint32_t cc_calc_ltugtu_32(CPUS390XState *env, uint32_t src,
668 - } else if (src < dst) {
675 -static inline uint32_t cc_calc_ltugtu_64(CPUS390XState *env, uint64_t src,
680 - } else if (src < dst) {
687 -static inline uint32_t cc_calc_tm_32(CPUS390XState *env, uint32_t val,
690 - uint16_t r = val & mask;
692 - HELPER_LOG("%s: val 0x%x mask 0x%x\n", __func__, val, mask);
693 - if (r == 0 || mask == 0) {
695 - } else if (r == mask) {
702 -/* set condition code for test under mask */
703 -static inline uint32_t cc_calc_tm_64(CPUS390XState *env, uint64_t val,
706 - uint16_t r = val & mask;
708 - HELPER_LOG("%s: val 0x%lx mask 0x%x r 0x%x\n", __func__, val, mask, r);
709 - if (r == 0 || mask == 0) {
711 - } else if (r == mask) {
714 - while (!(mask & 0x8000)) {
718 - if (val & 0x8000) {
726 -static inline uint32_t cc_calc_nz(CPUS390XState *env, uint64_t dst)
731 -static inline uint32_t cc_calc_add_64(CPUS390XState *env, int64_t a1,
732 - int64_t a2, int64_t ar)
734 - if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
735 - return 3; /* overflow */
739 - } else if (ar > 0) {
747 -static inline uint32_t cc_calc_addu_64(CPUS390XState *env, uint64_t a1,
748 - uint64_t a2, uint64_t ar)
757 - if (ar < a1 || ar < a2) {
765 -static inline uint32_t cc_calc_sub_64(CPUS390XState *env, int64_t a1,
766 - int64_t a2, int64_t ar)
768 - if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
769 - return 3; /* overflow */
773 - } else if (ar > 0) {
781 -static inline uint32_t cc_calc_subu_64(CPUS390XState *env, uint64_t a1,
782 - uint64_t a2, uint64_t ar)
795 -static inline uint32_t cc_calc_abs_64(CPUS390XState *env, int64_t dst)
797 - if ((uint64_t)dst == 0x8000000000000000ULL) {
806 -static inline uint32_t cc_calc_nabs_64(CPUS390XState *env, int64_t dst)
811 -static inline uint32_t cc_calc_comp_64(CPUS390XState *env, int64_t dst)
813 - if ((uint64_t)dst == 0x8000000000000000ULL) {
815 - } else if (dst < 0) {
817 - } else if (dst > 0) {
825 -static inline uint32_t cc_calc_add_32(CPUS390XState *env, int32_t a1,
826 - int32_t a2, int32_t ar)
828 - if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
829 - return 3; /* overflow */
833 - } else if (ar > 0) {
841 -static inline uint32_t cc_calc_addu_32(CPUS390XState *env, uint32_t a1,
842 - uint32_t a2, uint32_t ar)
851 - if (ar < a1 || ar < a2) {
859 -static inline uint32_t cc_calc_sub_32(CPUS390XState *env, int32_t a1,
860 - int32_t a2, int32_t ar)
862 - if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
863 - return 3; /* overflow */
867 - } else if (ar > 0) {
875 -static inline uint32_t cc_calc_subu_32(CPUS390XState *env, uint32_t a1,
876 - uint32_t a2, uint32_t ar)
889 -static inline uint32_t cc_calc_abs_32(CPUS390XState *env, int32_t dst)
891 - if ((uint32_t)dst == 0x80000000UL) {
900 -static inline uint32_t cc_calc_nabs_32(CPUS390XState *env, int32_t dst)
905 -static inline uint32_t cc_calc_comp_32(CPUS390XState *env, int32_t dst)
907 - if ((uint32_t)dst == 0x80000000UL) {
909 - } else if (dst < 0) {
911 - } else if (dst > 0) {
918 -/* calculate condition code for insert character under mask insn */
919 -static inline uint32_t cc_calc_icm_32(CPUS390XState *env, uint32_t mask,
924 - HELPER_LOG("%s: mask 0x%x val %d\n", __func__, mask, val);
928 - } else if (val & 0x80000000) {
935 - if (!val || !mask) {
938 - while (mask != 1) {
951 -static inline uint32_t cc_calc_slag(CPUS390XState *env, uint64_t src,
954 - uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
957 - /* check if the sign bit stays the same */
958 - if (src & (1ULL << 63)) {
964 - if ((src & mask) != match) {
969 - r = ((src << shift) & ((1ULL << 63) - 1)) | (src & (1ULL << 63));
971 - if ((int64_t)r == 0) {
973 - } else if ((int64_t)r < 0) {
981 -static inline uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
982 - uint64_t src, uint64_t dst, uint64_t vr)
991 - /* cc_op value _is_ cc */
994 - case CC_OP_LTGT0_32:
995 - r = cc_calc_ltgt0_32(env, dst);
997 - case CC_OP_LTGT0_64:
998 - r = cc_calc_ltgt0_64(env, dst);
1000 - case CC_OP_LTGT_32:
1001 - r = cc_calc_ltgt_32(env, src, dst);
1003 - case CC_OP_LTGT_64:
1004 - r = cc_calc_ltgt_64(env, src, dst);
1006 - case CC_OP_LTUGTU_32:
1007 - r = cc_calc_ltugtu_32(env, src, dst);
1009 - case CC_OP_LTUGTU_64:
1010 - r = cc_calc_ltugtu_64(env, src, dst);
1013 - r = cc_calc_tm_32(env, src, dst);
1016 - r = cc_calc_tm_64(env, src, dst);
1019 - r = cc_calc_nz(env, dst);
1021 - case CC_OP_ADD_64:
1022 - r = cc_calc_add_64(env, src, dst, vr);
1024 - case CC_OP_ADDU_64:
1025 - r = cc_calc_addu_64(env, src, dst, vr);
1027 - case CC_OP_SUB_64:
1028 - r = cc_calc_sub_64(env, src, dst, vr);
1030 - case CC_OP_SUBU_64:
1031 - r = cc_calc_subu_64(env, src, dst, vr);
1033 - case CC_OP_ABS_64:
1034 - r = cc_calc_abs_64(env, dst);
1036 - case CC_OP_NABS_64:
1037 - r = cc_calc_nabs_64(env, dst);
1039 - case CC_OP_COMP_64:
1040 - r = cc_calc_comp_64(env, dst);
1043 - case CC_OP_ADD_32:
1044 - r = cc_calc_add_32(env, src, dst, vr);
1046 - case CC_OP_ADDU_32:
1047 - r = cc_calc_addu_32(env, src, dst, vr);
1049 - case CC_OP_SUB_32:
1050 - r = cc_calc_sub_32(env, src, dst, vr);
1052 - case CC_OP_SUBU_32:
1053 - r = cc_calc_subu_32(env, src, dst, vr);
1055 - case CC_OP_ABS_32:
1056 - r = cc_calc_abs_64(env, dst);
1058 - case CC_OP_NABS_32:
1059 - r = cc_calc_nabs_64(env, dst);
1061 - case CC_OP_COMP_32:
1062 - r = cc_calc_comp_32(env, dst);
1066 - r = cc_calc_icm_32(env, src, dst);
1069 - r = cc_calc_slag(env, src, dst);
1072 - case CC_OP_LTGT_F32:
1073 - r = set_cc_f32(src, dst);
1075 - case CC_OP_LTGT_F64:
1076 - r = set_cc_f64(src, dst);
1078 - case CC_OP_NZ_F32:
1079 - r = set_cc_nz_f32(dst);
1081 - case CC_OP_NZ_F64:
1082 - r = set_cc_nz_f64(dst);
1086 - cpu_abort(env, "Unknown CC operation: %s\n", cc_name(cc_op));
1089 - HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
1090 - cc_name(cc_op), src, dst, vr, r);
1094 -uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
1097 - return do_calc_cc(env, cc_op, src, dst, vr);
1100 -uint32_t HELPER(calc_cc)(uint32_t cc_op, uint64_t src, uint64_t dst,
1103 - return do_calc_cc(env, cc_op, src, dst, vr);
1106 uint64_t HELPER(cvd)(int32_t bin)
1109 @@ -1594,14 +1105,7 @@ void HELPER(tr)(uint32_t len, uint64_t array, uint64_t trans)
1112 #ifndef CONFIG_USER_ONLY
1114 -void HELPER(load_psw)(uint64_t mask, uint64_t addr)
1116 - load_psw(env, mask, addr);
1117 - cpu_loop_exit(env);
1120 -static void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
1121 +void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
1123 qemu_log("program interrupt at %#" PRIx64 "\n", env->psw.addr);
1125 @@ -2175,30 +1679,6 @@ uint32_t HELPER(sigp)(uint64_t order_code, uint32_t r1, uint64_t cpu_addr)
1129 -void HELPER(sacf)(uint64_t a1)
1131 - HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1);
1133 - switch (a1 & 0xf00) {
1135 - env->psw.mask &= ~PSW_MASK_ASC;
1136 - env->psw.mask |= PSW_ASC_PRIMARY;
1139 - env->psw.mask &= ~PSW_MASK_ASC;
1140 - env->psw.mask |= PSW_ASC_SECONDARY;
1143 - env->psw.mask &= ~PSW_MASK_ASC;
1144 - env->psw.mask |= PSW_ASC_HOME;
1147 - qemu_log("unknown sacf mode: %" PRIx64 "\n", a1);
1148 - program_interrupt(env, PGM_SPECIFICATION, 2);
1153 /* invalidate pte */
1154 void HELPER(ipte)(uint64_t pte_addr, uint64_t vaddr)